Physical Sciences and Mathematics Commons^™

Multiprocessor File System Interfaces, David Kotz

Dartmouth Scholarship

Increasingly, file systems for multiprocessors are designed with parallel access to multiple disks, to keep I/O from becoming a serious bottleneck for parallel applications. Although file system software can transparently provide high-performance access to parallel disks, a new file system interface is needed to facilitate parallel access to a file from a parallel application. We describe the difficulties faced when using the conventional (Unix-like) interface in parallel applications, and then outline ways to extend the conventional interface to provide convenient access to the file for parallel programs, while retaining the traditional interface for programs that have no need for explicitly …

The Interbase Parallel Language: Supporting The Flex Transaction Model And Beyond, Ahmed K. Elmagarmid, Jiansan Chen

Department of Computer Science Technical Reports

No abstract provided.

Interbase: An Execution Environment For Global Applications Over Distributed, Autonomous And, Heterogeneous Software Systems, Ahmed K. Elmagarmid, Jiansan Chen, Weimin Du, Omran Bukhres, Rob Pezzoli

Department of Computer Science Technical Reports

No abstract provided.

A Workload Partitioning Strategy For Pdes By A Generalized Neural Network, H. Byun, S. K. Kortesis, Elias N. Houstis

Department of Computer Science Technical Reports

No abstract provided.

Integrated Symbolic-Numeric Computing In //Ellpack: Experiences And Plans, Sanjiva Weerawarana, Ann C. Catlin, Elias N. Houstis, John R. Rice

Department of Computer Science Technical Reports

No abstract provided.

Performance Analysis Of A Polyhedral Boolean Set Operations Algorithm, George Vanĕček, Dana S. Nau, Raghu R. Karinthi

Department of Computer Science Technical Reports

No abstract provided.

The Speedup And Efficiency Of 3-D Fft On Distributed Memory Mimd Systems, Dan C. Marinescu

Department of Computer Science Technical Reports

No abstract provided.

Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 8, Number 3, March 1992, College Of Engineering And Computer Science, Wright State University

BITs and PCs Newsletter

An eight page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.

A Non-Deterministric Parallel Sorting Algorithm, Xue Shirley Li, F. Lockwood Morris

Electrical Engineering and Computer Science - Technical Reports

A miniswap Si,1 ≤ i < n, compares two adjacent keys Пi, Пi+1 in the sequence (П1, ... , Пn), and transposes them if they are out of order. A full sweep is any composition of all n - 1 possible miniswaps. We prove that the composition of any n- 1 full sweeps is a sorting function.

Ppmb: A Partial-Multiple-Bus Multiprocessor Architecture With Improved Cost-Effectiveness, Hong Jiang, Kenneth C. Smith

School of Computing: Faculty Publications

This paper addresses the design and performance analysis of partial-multiple-bus interconnection networks. They are bus architectures that have evolved from multiple-bus structure by dividing buses into groups and reducing bus connections. Their effect is to reduce cost and alleviate arbitration and drive requirements without degrading performance significantly. One such structure, called processor-oriented partial-multiple-bus (or PPMB), is proposed. It serves as an alternative to the conventional structure called memory-oriented partial-multiple-bus (or MPMB) and is aimed at higher system performance at less or equal system cost. It has been shown, both analytically and by simulation, that a substantial increase in system bandwidth …

Implementation And Analysis Of Np-Complete Algorithms On A Distributed Memory Computer, Joel S. Garmon

Theses and Dissertations

The purpose of this research is to explore methods used to parallelize NP-complete problems and the degree of improvement that can be realized using different methods of load balancing. A serial and four parallel A* branch and bound algorithms were implemented and executed on an Intel iPSC/2 hypercube computer. One parallel algorithm used a global, or centralized, list to store unfinished work and the other three parallel algorithms used a distributed list to store unfinished work locally on each processor. the three distributed list algorithms are: without load balancing, with load balancing, and with load balancing and work distribution. The …

An Examination Of Hypercube Implementations Of Genetic Algorithms, Andrew Dymek

Theses and Dissertations

Genetic algorithms are stochastic search algorithms which model natural adaptive systems. In support of the development of a genetic search package for AFIT's iPSC/2 Hypercube, this study focused on two problem areas associated with hypercube implementations. Premature convergence occurs when the population becomes dominated by locally optimal, but globally inferior, solutions. Based on an examination of past hypercube implementations, the selection and communication strategies were hypothesized as causes of premature convergence. Experiments to test these hypotheses were conducted on Rosenbrock's saddle, a function often associated with premature convergence. Communication of best solutions led to premature convergence in small population sizes, …

Hardware-Verification Through Logic Extraction, Michael A. Dukes

Theses and Dissertations

A Prolog-based system is described which employs logic-extraction to perform hardware-verification. The extraction rules are built automatically from hierarchical structural VHDL models, enabling the equivalence of a structural VHDL description and a layout specification to be verified. Pin-to-pin critical- path analysis is performed within the logic-extraction process; many noncritical paths are pruned early, making pin-to-pin critical path analysis of large circuits feasible. It is demonstrated that a design methodology based on logic extraction, VHDL, and a layout tool can provide a fabricated functionally- correct IC design without circuit-level or switch-level simulation. This methodology is shown to be practical for VLSI …

Boolean Reasoning And Informed Search In The Minimization Of Logic Circuits, James J. Kainec

Theses and Dissertations

The minimization of logic circuits has been an important area of research for more than a half century. The approaches taken in this field, however, have for the most part been ad hoc. Boolean techniques have been employed to manipulate formulas, but not to perform symbolic reasoning. Boolean equations are employed principally as icons; they are never solved. The first objective of this dissertation is to apply Boolean reasoning systematically and uniformly to the minimization problem. Boolean reasoning entails the reduction of systems of Boolean equations to a single equation; the single equation is an abstraction, independent of the form …

Causal Univariate Spatial-Temporal Autoregressive Moving Averages (Starma) Modelling Of Target Information To Generate Tasking Of A World-Wide Sensor System, Kelly A. Greene

Theses and Dissertations

The Department of Defense employs a resource limited world-wide sensor system to detect certain events of interest. The purpose of this research was to establish a methodology using a univariate causal STARMA model for forecasting the relative probability of an event occurring in a geographical location during a time block of the day. These relative probabilities are used as input for a tasking model that assigns the scarce sensor resources so as to optimize the detection of these events. The STARMA model is appropriate for forecasting the relative probabilities because a definite temporal relationship and a definite spatial relationship exists …

Development Of A Flight Information System Using The Structured Method, Yeong-Lae Kwak

Theses and Dissertations

This thesis documents the development of a database system for the Flight Information System (FIS) of the Korean Air Force. The scope of the FIS is too large to be covered by this thesis. Thus, this thesis covers only the core part of the FIS due to the limitation of time and man-power. This thesis uses the structured method. Structured analysis and structured design techniques are mainly used two techniques. This thesis focused not only the development of the FIS but also the application of the software development method, the structured method, and its tools such as DFD, DD, ERD, …

Satool Ii: An IdefO Case Workbench Using Ada And The X Window System, Betty Topp

Theses and Dissertations

The objective of this research effort is to perform an object oriented analysis, design and implementation of the graphical user interface (GUI) for the SATool II system. SATool II is a computer Assisted Software Engineering (CASE) workbench developed using Ada and the X Window system. It is designed to serve as an IDEFo graphical project editor and data dictionary editor. IDEF₀ is the ICAM Definition Method Zero graphical notation language adopted by the Air Force to produce a function model of a manufacturing system or environment. The Air Force Institute of Technology is conducting on-going research in the use …

Reservable Transactions: An Approach For Reliable Multidatabase Transaction Management, Ahmed K. Elmagarmid, Jin Jing, James G. Mullen, Jamshid Sharif-Askary

Department of Computer Science Technical Reports

No abstract provided.

Algebraic Surface Design And Finite Element Meshes, Chanderjit L. Bajaj

Department of Computer Science Technical Reports

No abstract provided.

Finding A Maximum-Density Planar Subset Of A Set Of Nets In A Channel, Ronald I. Greenberg, Jau-Der Shih

Computer Science: Faculty Publications and Other Works

We present efficient algorithms to find a maximum-density planar subset of n 2-pin nets in a channel. The simplest approach is to make repeated usage of Supowit's dynamic programming algorithm for finding a maximum-size planar subset, which leads to O(n^3) time to find a maximum-density planar subset. But we also provide an algorithm whose running time is dependent on other problem parameters and is often more efficient. A simple bound on the running time of this algorithm is O(nlgn+n(t+1)w), where t is the number of two-sided nets, and w is the number of nets in the output. Though the worst-case …

Software Forensics: Can We Track Code To Its Authors?, Eugene H. Spafford, Stephen A. Weeber

Department of Computer Science Technical Reports

No abstract provided.

Multiswitch Hardware Configuration, Douglas E. Comer, Victor Norman

Department of Computer Science Technical Reports

No abstract provided.

Ada In The Soviet Union, Peter Wolcott

Information Systems and Quantitative Analysis Faculty Proceedings & Presentations

Over the last decade and a half, the Ada programming language has aroused more financial, technical, political, and emotional forces than any other programming language. Because the language is a product of more than just technical factors, its progress is heavily influenced by the surrounding social, economic, and political environment. Judging by the technical characteristics of the language and the goals for its use, one would expect that Ada would be the subject of intense development by the USSR, as well as by the USA. In practice, the Ada experiences in these countries differ considerably. We examine the state of …

Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 8, Number 2, February 1992, College Of Engineering And Computer Science, Wright State University

BITs and PCs Newsletter

An eight page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.

Conceptual Background For Symbolic Computation, Klaus Berkling

Electrical Engineering and Computer Science - Technical Reports

This paper is a tutorial which examines the three major models of computation--the Turing Machine, Combinators, and Lambda Calculus--with respect to their usefulness to practical engineering of computing machines. While the classical von Neumann architecture can be deduced from the Turing Machine model, and Combinator machines have been built on an experimental basis, no serious attempts have been made to construct a Lambda Calculus machine. This paper gives a basic outline of how to incorporate a Lambda Calculus capability into a von Neumann type architecture, maintaining full backward compatibility and at the same time making optimal use of its advantages …

Fault-Detection In Networks, H. F. Mattson Jr

Electrical Engineering and Computer Science - Technical Reports

To find broken links in networks we use the cut-set space. Information on which nodes can talk, or not, to which other nodes allows reduction of the problem to that of decoding the cut-set code of a graph. Special classes of such codes are known to have polynomial-time decoding algorithms. We present a simple algorithm to achieve the reduction and apply it in two examples.

A Declarative Foundation Of Λprolog With Equality, Mino Bai

Electrical Engineering and Computer Science - Technical Reports

We build general model-theoretic semantics for higher-order logic programming languages. Usual semantics for first-order logic is two-level: i.e., at a lower level we define a domain of individuals, and then, we define satisfaction of formulas with respect to this domain. In a higher-order logic which includes the propositional type in its primitive set of types, the definition of satisfaction of formulas is mutually recursive with the process of evaluation of terms. As result of this in higher-order logic it is extremely difficult to define an effective semantics. For example to define T p operator for logic program P, we need …

Dynamic Machine Scheduling, Expansion, And Control Of A Generic Workcell, Peter A. Murray

Theses

Factory automation has come a long way since the invention of the automatic flour mill. A workcell is a group of machines (robots) working together to produce a product. In the past workcells have been hard wired using methods such as Programmable Logic Controllers (PLCs). To change a part of this system would require reprogramming the entire system.

The Generic Work Cell (GWC) is a dynamic architecture which allows a workcell to be modified on the fly. The architecture enables the generation of new cells with minimal effort, and the modification of the system without reprogramming the entire system. The …

Binary Image Decomposition And Compression Using Mathematical Morphology For Object Recognition, Venu Gopal Gogusetti

Theses

Image segmentation has been studied for several years. There are several segmentation techniques which are fast and effective but all of them are lacking the property of invariency to shift, rotation and sizing. In this study a new process is introduced which overcomes the shift, size and rotation variance and the compressed data can be used for object recognition.

Euclidean distance measurement is used in the compression process which is rotation invarient but is expensive in terms of time. Eucledean distance transformation is calculated using optimal double two scan algorithm with gray scale morphology, a new method developed by Dr. …

Searching For Orthogonal States Of Neural Networks, Heng Wang

Theses

Two approaches to find orthogonal states of neural network are presented in the paper. The first approach is a recursive one, it builds N orthogonal vectors based on N /2 orthogonal vectors. The second approach is a formula approach, in which orthogonal vectors can be obtained using a formula. Using these approaches, orthogonal states of neural network are found. Some properties of the neural network built on these orthogonal vectors are presented in Appendix A and some examples are given in Appendix B.